![]() IMEC, AIXTRON set important step towards low-cost GaN power devices June 03, 2008 | User rating: not shown ( 2 vote(s) ) | No comments yet
IMEC, Europe's leading independent research center in the field of nanoelectronics, and AIXTRON, the world leader in metal-organic chemical-vapor deposition (MOCVD) equipment, have demonstrated the growth ... | |
![]() Intel, Micron First to Deliver Sub-40 Nanometer NAND Flash Memory Device May 29, 2008 | User rating: 3.2 / 5 after 9 vote(s)
| User comments: 1
Today Intel Corporation and Micron Technology, Inc. introduced the industry's first sub-40 nanometer NAND memory device, unveiling a 34nm 32 gigabit multi-level cell chip. This process technology was jointly ... | |
![]() Rensselaer student invents alternative to silicon chip May 13, 2008 | User rating: 4.6 / 5 after 98 vote(s)
| User comments: 13
Even before Weixiao Huang received his doctorate from Rensselaer Polytechnic Institute, his new transistor captured the attention of some of the biggest American and Japanese automobile companies. The 2008 ... | |
Intel, Samsung, TSMC Reach Agreement for 450mm Wafer Manufacturing Transition May 06, 2008 | User rating: 3.4 / 5 after 10 vote(s)
| User comments: 1
Intel Corp., Samsung Electronics and TSMC today announced they have reached agreement on the need for industry-wide collaboration to target a transition to larger, 450mm-sized wafers starting in 2012. The transition to larger ... | |
![]() Epson, E Ink Develop Breakthrough Controller IC for Electronic Paper Displays April 16, 2008 | User rating: not shown ( 2 vote(s) ) | No comments yet
Seiko Epson and E Ink today announced a jointly developed display controller IC enabling new capabilities for E Ink's Vizplex enabled electronic paper displays. EPD low-power consumption screen technology ... | |
The future of computing -- carbon nanotubes and superconductors to replace the silicon chip March 28, 2008 | User rating: 4.1 / 5 after 12 vote(s)
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The future of computing is under the spotlight at the Institute of Physics’ Condensed Matter and Materials Physics conference at the Royal Holloway College of the University of London on 26-28 March. | |
![]() Silent, microchip-sized 'fan' has no moving parts, yet produces enough wind to cool a laptop March 18, 2008 | User rating: 4.5 / 5 after 110 vote(s)
| User comments: 11
Engineers harnessing the same physical property that drives silent household air purifiers have created a miniaturized device that is now ready for testing as a silent, ultra-thin, low-power and low maintenance ... | |
![]() IBM researchers unveil green optical network technology prototype February 28, 2008 | User rating: 4.6 / 5 after 80 vote(s)
| User comments: 1
IBM researchers today unveiled the fastest and most highly integrated optical data bus ever developed. The prototype technology could bring massive amounts of bandwidth in an energy-efficient way to all kinds ... | |
AMD, Partners Produce Test Chip Using EUV Lithography February 26, 2008 | User rating: 4.3 / 5 after 21 vote(s)
| User comments: 3
AMD, working together with its research partner, IBM, announced it has produced a working test chip utilizing Extreme Ultra-Violet (EUV) lithography for the critical first layer of metal connections across the entire chip. ... | |
![]() IMEC obtains record conversion efficiency of 24.7% for GaAs solar cells on Ge substrate February 25, 2008 | User rating: not shown ( 2 vote(s) ) | User comments: 1
IMEC has realized a single-junction GaAs solar cell on a Ge substrate with a record conversion efficiency of 24.7%. The efficiency was measured and confirmed by NREL (National Renewable Energy Laboratory, ... | |
NXP announces world's smallest high-performance MOSFET February 25, 2008 | User rating: not shown ( 4 vote(s) ) | No comments yet
NXP Semiconductors, the independent company founded by Philips, today announced a new range of small signal MOSFET devices housed in one of the world’s smallest packages, the SOT883. Boasting an ultra-small 1.0 x 0.6 mm footprint, ... | |
Advanced engineered substrates boost chip performance February 21, 2008 | User rating: not shown ( 2 vote(s) ) | No comments yet
A single platform that combines the benefits of strained silicon and silicon-on-insulator technologies hopes to offer much improved performance for future chip generations. | |
![]() Breaking the performance barrier of 22-nm CMOS technology February 19, 2008 | User rating: 4.4 / 5 after 25 vote(s)
| User comments: 1
A major initiative has been launched in Europe with a top-ranked project called DUALLOGIC, Dual channel CMOS for (sub)-22 nm high performance logic. | |
SEMATECH Achieves Single Digit EUV Mask Blank Defect Goal February 11, 2008 | User rating: not shown ( 1 vote(s) ) | User comments: 3
Technologists at SEMATECH have successfully demonstrated world-class results in low defect density for mask blanks used in extreme ultraviolet lithography (EUVL)—pushing the technology another significant step toward readiness ... | |
EPIC: Building the Perfect Chip February 07, 2008 | User rating: 4.6 / 5 after 8 vote(s)
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Three years ago a team from Bell Labs took on a very daunting challenge – put an optical networking system on a commercially manufactured silicon chip, load it with a smorgasbord of sophisticated opto-electronic devices in ... | |
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